/*
 * Copyright (c) 2006-2018, RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2019-01-02     zylx         first version
 * 2019-01-08     SummerGift   clean up the code
 */

#ifndef __DMA_CONFIG_H__
#define __DMA_CONFIG_H__

#include <rtthread.h>

#ifdef __cplusplus
extern "C" {
#endif

/* DMA0 channel0 */

/* DMA0 channel1 */
#if defined(BSP_SPI0_RX_USING_DMA) && !defined(SPI0_RX_DMA_INSTANCE)
#define SPI0_DMA_RX_IRQHandler           DMA0_Channel1_IRQHandler
#define SPI0_RX_DMA_RCC                  RCU_DMA0
#define SPI0_RX_DMA_INSTANCE             DMA0
#define SPI0_RX_DMA_CHANNEL              DMA_CH1
#define SPI0_RX_DMA_IRQ                  DMA0_Channel1_IRQn
#endif
/* DMA0 channel2 */
#if defined(BSP_SPI0_TX_USING_DMA) && !defined(SPI0_TX_DMA_INSTANCE)
#define SPI0_DMA_TX_IRQHandler           DMA0_Channel2_IRQHandler
#define SPI0_TX_DMA_RCC                  RCU_DMA0
#define SPI0_TX_DMA_INSTANCE             DMA0
#define SPI0_TX_DMA_CHANNEL              DMA_CH2
#define SPI0_TX_DMA_IRQ                  DMA0_Channel2_IRQn
#elif defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
#define USART2_DMA_RX_IRQHandler           DMA0_Channel2_IRQHandler
#define USART2_RX_DMA_RCU                  RCU_DMA0
#define USART2_RX_DMA_INSTANCE             DMA0
#define USART2_RX_DMA_CHANNEL              DMA_CH2
#define USART2_RX_DMA_IRQ                  DMA0_Channel2_IRQn
#endif

/* DMA0 channel3 */
#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
#define SPI1_DMA_RX_IRQHandler           DMA0_Channel3_IRQHandler
#define SPI1_RX_DMA_RCC                  RCU_DMA0
#define SPI1_RX_DMA_INSTANCE             DMA0
#define SPI1_RX_DMA_CHANNEL              DMA_CH3
#define SPI1_RX_DMA_IRQ                  DMA0_Channel3_IRQn
#endif    
/* DMA0 channel4 */
#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
#define SPI1_DMA_TX_IRQHandler           DMA0_Channel4_IRQHandler
#define SPI1_TX_DMA_RCC                  RCU_DMA0
#define SPI1_TX_DMA_INSTANCE             DMA0
#define SPI1_TX_DMA_CHANNEL              DMA_CH4
#define SPI1_TX_DMA_IRQ                  DMA0_Channel4_IRQn
#elif defined(BSP_UART0_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
#define USART0_DMA_RX_IRQHandler          DMA0_Channel4_IRQHandler
#define USART0_RX_DMA_RCU                 RCU_DMA0
#define USART0_RX_DMA_INSTANCE            DMA0
#define USART0_RX_DMA_CHANNEL             DMA_CH4
#define USART0_RX_DMA_IRQ                 DMA0_Channel4_IRQn
#endif
/* DMA0 channel5 */
#if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
#define USART1_DMA_RX_IRQHandler           DMA0_Channel5_IRQHandler
#define USART1_RX_DMA_RCU                  RCU_DMA0
#define USART1_RX_DMA_INSTANCE             DMA0
#define USART1_RX_DMA_CHANNEL              DMA_CH5
#define USART1_RX_DMA_IRQ                  DMA0_Channel5_IRQn
#endif
/* DMA0 channel6 */

/* DMA1 channel0 */
#if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
#define SPI2_DMA_RX_IRQHandler           DMA1_Channel0_IRQHandler
#define SPI2_RX_DMA_RCC                  RCU_DMA1
#define SPI2_RX_DMA_INSTANCE             DMA1
#define SPI2_RX_DMA_CHANNEL              DMA_CH0
#define SPI2_RX_DMA_IRQ                  DMA1_Channel0_IRQn
#endif
/* DMA1 channel1 */
#if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
#define SPI2_DMA_TX_IRQHandler           DMA1_Channel1_IRQHandler
#define SPI2_TX_DMA_RCC                  RCU_DMA1
#define SPI2_TX_DMA_INSTANCE             DMA1
#define SPI2_TX_DMA_CHANNEL              DMA_CH1
#define SPI2_TX_DMA_IRQ                  DMA1_Channel1_IRQn
#endif
/* DMA1 channel2 */
#if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE)
#define USART3_DMA_RX_IRQHandler           DMA1_Channel2_IRQHandler
#define USART3_RX_DMA_RCU                  RCU_DMA1
#define USART3_RX_DMA_INSTANCE             DMA1
#define USART3_RX_DMA_CHANNEL              DMA_CH2
#define USART3_RX_DMA_IRQ                  DMA1_Channel2_IRQn
#endif
/* DMA1 channel3 */

/* DMA1 channel4 */


#ifdef __cplusplus
}
#endif


#endif /* __DMA_CONFIG_H__ */
